Sneha D Sajja

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System Validation Engineer

Mill Creek, WA

SNEHA D SAJJA                                                                    (616)666-9986

Mill Creek, WA, 98012
deepusajja@hotmail.com

https://www.linkedin.com/in/snehasajja

SUMMARY
Highly motivated, results-driven, quick learner with over 2 years of experience in pre & post silicon validation on Client and SoC platforms. Experience in test plan creation, test content development and debug failures on emulation, virtual platforms and post silicon at full chip system level. Developed web applications for smart-phones and tablets. Key skills:

Ÿ C++                                       Ÿ SoC architecture                 Ÿ Visual Studio 2015

Ÿ Verilog                                   Ÿ Emulation and Debug         Ÿ Verdi/ Debussy

Ÿ HTML5/JavaScript                Ÿ UNIX                                   Ÿ Cadence Virtuoso

 

PROFESSIONAL EXPERIENCE
INTEL CORPORATION, Hillsboro, OR                                                                        2014 – 2016

System Validation Engineer, July 2015 – June 2016
Defined, executed and debugged wireless connectivity (Wi-Fi and Bluetooth) test cases for System on Chip (SoC) in System Level Emulation environment. Debugged failures using traces and waveform captures and worked with designers to drive issues to resolution. Worked on PCIe, USB2.0, USB3.0 and UART bus validation.

·         Identified a critical bug in pre silicon stage and worked with designers and architects to fix the issue instead of post silicon and thus reduced effort and cost for the fix

·         Enabled test cases in post silicon using validation automation tool that performs test scheduling, test execution and failure analysis

·         Prepared training documents and provided support to co-workers using the automation tool, resulting in major reduction in the ramp time

·         Mentored newly joined intern and helped her in smooth integration into Intel’s work culture

 

System Validation Engineer, July 2014 – July 2015

Performed post silicon Graphics validation including board bring up, firmware/BIOS updates, enabled test content and determined root cause of failures using post silicon debug tools like Logic Analyzer and Lauterbach. Validated Graphics test content on System Level Emulation (SLE) and Hybrid SLE environment at full chip level.

·         Consistently met validation milestones during the crucial period, thus assisting in the launch of the product on time

·         Involved in a team effort to successfully migrate to a newer version of OS and received a Recognition Award for contributing towards this effort

·         Closely collaborated with stakeholders/customers maintaining excellent sense of teamwork and received commendation for the same

·         Proactively filled in for a supervisor during her absence and effectively delivered the tasks

 

Product Development Group Architecture Intern, Feb 2014 – June 2014
Assisted the team in developing high level transaction flow specifications for wireless connectivity (Wi-Fi, Bluetooth and FM) for System on Chip (SoC)

·         Developed scripts to create project indicators (tables and charts) extracting the information from a database, providing clear and concise method to view reports and eliminating data inconsistencies which resulted in receiving a Recognition Award

·         Developed Perl scripts to extract Register Definition Language (RDL) information from XML files and delivered to the development team
TATA CONSULTANCY SERVICES, Hyderabad, India                            July 2011 – June 2012

Assistant Systems Engineer, July 2011 – June 2012
Developed C++ code in MVC architecture to store and modify customer information for a telecommunications service provider. Developed database schemas in MySQL and created object models in C++. Developed front end UI applications for smart phones and tablets.

·         Performed requirement analysis, design, coding and testing for a mobile application using HTML5, CSS3, JavaScript and jQuery

·         Performed requirement analysis and integration of new features to an existing library

EDUCATION
Master’s Degree, Electrical Engineering
Portland State University, Portland, OR

 

Skills

  • C++
  • Debug
  • Emulation validation
  • SoC architecture
  • System Validation
  • Unix
  • Updated 5 years ago

To contact this candidate email snehadeepthi.s@gmail.com

Contact using webmail: Gmail / AOL / Yahoo / Outlook

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